2015 -2023 Principal Engineer - Physical Design Methodology @
2012 -2015 Physical Design Lead @
2008 -2012 Senior Physical Design Engineer @
2001 -2008 Tech Lead-Physical Design @
Ramesh Murugesan Education
University of Madras
Bachelor of Engineering (Electrical & Electronics)
1996-2000
Ramesh Murugesan Skills
Python
Physical Design
Mixed Signal
Design
Static Timing Analysis
Application Specific Integrated Circuits Asic
Signal Integrity
Clock Tree Synthesis
Low Power Design
Floorplanning
Debugging
Primetime
Physical Verification
Logic Synthesis
Timing Closure
RTL design
Application Specific Integrated Circuits
Ramesh Murugesan Summary
Ramesh Murugesan, based in Austin, TX, US, is currently a Senior Engineering Manager - Physical Design Methodology at NVIDIA. Ramesh Murugesan brings experience from previous roles at NVIDIA and Wipro Technologies (Consultant at Texas Instruments). Ramesh Murugesan holds a 1996 - 2000 Bachelor of Engineering in Electrical & Electronics @ University of Madras. With a robust skill set that includes Python, Physical Design, Mixed Signal, Design, Static Timing Analysis and more. Ramesh Murugesan has 3 emails and 2 mobile phone numbers on RocketReach.
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