Hardware Engineer @ Innovative communications systems (September 2003 - June 2005)
Rajkumar P Education
QuantInsti
Executive Programme in Algorithmic Investing/Trading
2017-2019
Mission College
Small Business Startup management
2016-2016
Centre for Advanced Computation
PG Diploma (VLSI Design)
2004-2005
Jawaharlal Nehru Technological University
B.Tech (ECE)
1999-2003
Rajkumar P Skills
DFT
Static Timing Analysis
TCL
Debugging
SoC
Scripting
ASIC
Application-Specific Integrated Circuits (ASIC)
System on a Chip (SoC)
Document Management
Records Management
Machine Learning
Perl
Verilog
VHDL
Embedded Systems
Python (Programming Language)
ATPG
BIST
Formal Verification
Functional Verification
JTAG
Silicon
Analog
Processors
RTL design
Cadence
EDA
DFT Compiler
Diagramming
Collaboration Tools
Confluence
Zsh
Tcl-Tk
VLSI CAD
2. Static Timing Analysis
IJTAG
Very-Large-Scale Integration (VLSI)
DFT Architectures with Tessent and Synopsys solutions
Silicon bringup
Rajkumar P Summary
Rajkumar P, based in Austin, TX, US, is currently a Principal Engineer at NVIDIA. Rajkumar P brings experience from previous roles at Meta, Samsung SARC | ACL, NVIDIA and Samsung Electronics. Rajkumar P holds a 2017 - 2019 Executive Programme in Algorithmic Investing/Trading @ QuantInsti. With a robust skill set that includes DFT, Static Timing Analysis, TCL, Debugging, SoC and more. Rajkumar P has 1 emails on RocketReach.
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