Rajkumar P Email & Phone Number
ASIC engineer DFT @ Meta
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Rajkumar P Location
- Austin, TX, US
Rajkumar P Work
- 2025 -now ASIC engineer DFT @
- 2018 -2025 Principal DFT @
- 2014 -2018 Senior Staff Engineer @
- 2012 -2014 Senior DFT Engineer @
- 2010 -2012 Staff Engineer @
- 2008 -2010 Hardware Engineer @
- 2005 -2008 Senior DFT consultant @
- 2003 -2005 Hardware Engineer @ Innovative communications systems
Rajkumar P Education
- QuantInsti
(Executive Programme in Algorithmic Investing/Trading)
2017-2019 - Mission College
(Small Business Startup management)
2016-2016 - Centre for Advanced Computation
PG Diploma (VLSI Design)
2004-2005 - Jawaharlal Nehru Technological University
B.Tech (ECE)
1999-2003
Rajkumar P Skills
- DFT
- Static Timing Analysis
- TCL
- Debugging
- SoC
- Scripting
- ASIC
- Application-Specific Integrated Circuits (ASIC)
- System on a Chip (SoC)
- Document Management
- Records Management
- Machine Learning
- Perl
- Verilog
- VHDL
- Embedded Systems
- Python (Programming Language)
- ATPG
- BIST
- Formal Verification
- Functional Verification
- JTAG
- Silicon
- Analog
- Processors
- RTL design
- Cadence
- EDA
- DFT Compiler
- Diagramming
- Collaboration Tools
- Confluence
- Zsh
- Tcl-Tk
- VLSI CAD
- 2. Static Timing Analysis
- IJTAG
- Very-Large-Scale Integration (VLSI)
Rajkumar P Summary
- Rajkumar P, based in Austin, TX, US, is currently a ASIC engineer DFT at Meta. Rajkumar P brings experience from previous roles at Samsung SARC | ACL, NVIDIA, Samsung Electronics and STMicroelectronics. Rajkumar P holds a 2017 - 2019 QuantInsti. With a robust skill set that includes DFT, Static Timing Analysis, TCL, Debugging, SoC and more. Rajkumar P has 3 emails on RocketReach.
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