Piya Paul's Location
Austin, TX, US
Piya Paul's Work
- Design Verification Engineer @ Intel Capital
- Design Verification Engineer @ Altera
- ASIC Design-Hardware Intern @ Marvell India
- Scientist/Engineer SC @ ISRO
- Visiting Student Researcher @ Tata Institute of Fundamental Research
Piya Paul's Education
- Texas A&M University
Master's degree (Computer Engineering)
2013 - 2014 - Visvesvaraya National Institute of Technology
Bachelor of Technology (B.Tech.) (Electrical, Electronics and Communications Engineering)
2006 - 2010
Piya Paul's Skills
- Cadence Virtuoso
- Algorithms
- Logic Bist
- Circuit Simulators
- C
- Digital IC Design
- SPICE
- Matlab
- Verilog
- Visual Basic
Piya Paul's Summary
Piya Paul, based in Austin, TX, US, is currently a Design Verification Engineer at Intel Corporation, bringing experience from previous roles at Altera, Marvell Semiconductor, ISRO - Indian Space Research Organisation and Tata Institute of Fundamental Research. Piya Paul holds a 2013 - 2014 Master's degree in Computer Engineering @ Texas A&M University. With a robust skill set that includes Cadence Virtuoso, Algorithms, Logic Bist, Circuit Simulators, C and more, Piya Paul contributes valuable insights to the industry. Piya Paul has 1 email on RocketReach.
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