Peter Wu Email & Phone Number
Senior Director, DSP and architecture @ Marvell India
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Peter Wu Location
- Palo Alto, CA, US
Peter Wu Work
- 2021 -now Senior Director, DSP and architecture @
- 2016 -2021 Director Of Engineering, DSP and Architecture @
- 2010 -2016 Technical manager, DSP algorithm and architecture @
- 2007 -2010 Senior Staff DSP engineer @
- 2002 -2007 DMTS @ Agere system
- 1999 -2002 Design Engineer @ Lucent
- 1998 -1999 Design Engineer @ Enable Semiconductor
- 1995 -1998 Design Engineer @
Peter Wu Education
- Georgia Institute of Technology
- University of Science and Technology of China
Peter Wu Skills
- SoC
- IC
- C++
- Mixed Signal
- Verilog
- RTL design
- ASIC
- Semiconductors
- Perl
- Photoshop
- Telecommunications
- Strategic Planning
Peter Wu Summary
- Peter Wu, based in Palo Alto, CA, US, is currently a Senior Director, DSP and architecture at Marvell Semiconductor. Peter Wu brings experience from previous roles at Marvell Semiconductor and Agere system. Peter Wu holds a Georgia Institute of Technology. With a robust skill set that includes SoC, IC, C++, Mixed Signal, Verilog and more. Peter Wu has 2 emails and 2 mobile phone numbers on RocketReach.
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