Peter Teng Email
Senior Staff Analog IC Design Engineer @ Marvell India
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Peter Teng Location
- Singapore
Peter Teng Work
- 2021 -now Senior Staff Analog IC Design Engineer @
- 2020 -2021 Scientist II @
- 2018 -2020 Senior Engineer @
- 2016 -2018 R and D Engineer @
- 2012 -2013 Research Engineer @
- 2010 -2012 Design Enablement @
Peter Teng Education
- National University of Singapore
Doctor of Philosophy - PhD (Electrical and Computer Engineering)
2013-2017 - National University of Singapore
Bachelor's degree (Electrical and Electronics Engineering)
2006-2010
Peter Teng Skills
- Matlab
- Integrated Circuits Ic
- Verilog
- VHDL
- EDA
- C
- C++
- SPICE
- Perl
- Integrated Circuits
Peter Teng Summary
- Peter Teng, based in Singapore, is currently a Senior Staff Analog IC Design Engineer at Marvell Technology. Peter Teng brings experience from previous roles at Institute of Microelectronics and Huawei Technologies. Peter Teng holds a 2013 - 2017 Doctor of Philosophy - PhD in Electrical and Computer Engineering @ National University of Singapore. With a robust skill set that includes Matlab, Integrated Circuits Ic, Verilog, VHDL, EDA and more. Peter Teng has 2 emails on RocketReach.
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