Peng Guo Email & Phone Number
Sr. Physical Design Manager @ Juniper Networks
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Peng Guo Location
- San Jose, CA, US
Peng Guo Work
- Sr. Physical Design Manager @ (May 2025 - Present)
- Principal AE Cadence @ (October 2022 - May 2025)
- Sr. CAD Engineer @ (July 2015 - October 2022)
- Principal ASIC Methodology Engineer @ (October 2012 - July 2015)
- Member of Technical Staff Physical Design Engineer @ Altera (April 2012 - October 2012)
- Senior Staff Physical Design Engineer @ (May 2011 - April 2012)
- Staff Engineer @ (January 2008 - May 2011)
- Engineer II @ (May 2005 - January 2008)
- Co-op Verification Engineer @ HDL, INC (January 2004 - March 2005)
- Teaching Assistant @ (January 2003 - March 2005)
Peng Guo Education
- Santa Clara University
Master of Science (ASIC)
2002-2005 - Dalian Maritime University
Bachelor of Applied Science (B.A.Sc.) (Mechanical Engineering)
1996-2000
Peng Guo Skills
- Static Timing Analysis
- Primetime
- MIPS
- Formal Verification
- Magma
- Simulations
- Physical Design
- Semiconductors
- Embedded Systems
- ASIC
- SoC
- Manufacturing
- EDA
- Logic Synthesis
Peng Guo Summary
- Peng Guo, based in San Jose, CA, US, is currently a Sr. Physical Design Manager at Juniper Networks. Peng Guo brings experience from previous roles at Cadence Design Systems, Microsoft, Broadcom Limited and Altera. Peng Guo holds a 2002 - 2005 Master of Science in ASIC @ Santa Clara University. With a robust skill set that includes Static Timing Analysis, Primetime, MIPS, Formal Verification, Magma and more. Peng Guo has 3 emails and 1 mobile phone numbers on RocketReach.
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