Pavan Pappu Email
Intern in RTL Design @ Start-up (stealth mode)
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Pavan Pappu Location
- Bengaluru, KA, IN
Pavan Pappu Work
- 2014 -now Intern in RTL Design @
- 2013 -2014 Internship in SOC validation @ INTEL INDIA
Pavan Pappu Education
- nit warangal
m.tech (VLSI Micro Electronics)
2012-2014 - gudlavalleru engineering college
bachelor in technology (electronics and communications engineering)
2007-2011 - nalanda junior college
intermediate education (M.P.C)
2005-2007 - kimberley high school
metriculation
2004-2005
Pavan Pappu Skills
- ASIC
- VERILOG
- CMOS
- Tanner EDA
- Digital IC Design
- C++ Language
- Python Scripting
- C language
- Mixed Signal
- System Verilog
- Mentor Questa Sim
- Object Oriented Perl
Pavan Pappu Summary
- Pavan Pappu, based in Bengaluru, KA, IN, is currently a Intern in RTL Design at Soft Machines. Pavan Pappu brings experience from previous roles at INTEL INDIA. Pavan Pappu holds a 2012 - 2014 m.tech in VLSI Micro Electronics @ nit warangal. With a robust skill set that includes ASIC, VERILOG, CMOS, Tanner EDA, Digital IC Design and more.
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Pavan Pappu
Project Management Specialist
Bengaluru, KA, IN
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