Product Engineer @ RCA Solid State (January 1983 - January 1985)
Paul Graves Education
University of Wisconsin-Madison
BSEE (Semiconductors)
1978-1983
Paul Graves Skills
Analog
Analog Circuit Design
Analog Design
Antennas
BiCMOS
CMOS
Cadence
Cadence Spectre
Cadence Virtuoso
Cadence Virtuoso Layout Editor
Cadence Virtuoso XL
Circuit Design
Circuit Simulation
Correlation Analysis
Cost Reduction/Avoidance
Design Engineering
Design for Manufacturing
Design of Experiments
Digital Electronics
EDA
Electronic Circuit Design
Electronics
Floorplanning
IC
Integrated Circuit Design
LVS
Layout Design
Microelectronics
Mixed Signal
Monte Carlo Simulation
Parasitic Extraction
Physical Design
Physical Verification
Product Engineering
RCX
RF
SPC
Schematic Capture
Semiconductor Device
Semiconductor Industry
Semiconductors
Silicon
Simulation
Simulations
Spectre
Test Engineering
USB
Verilog
Virtuoso
Yield Management
Paul Graves Summary
Paul Graves, based in McKinney, TX, US, is currently a Layout Design Engineer at IC Enable. Paul Graves brings experience from previous roles at Pregnancy Resources Inc. and Intersil. Paul Graves holds a 1978 - 1983 BSEE in Semiconductors @ University of Wisconsin-Madison. With a robust skill set that includes Analog, Analog Circuit Design, Analog Design, Antennas, BiCMOS and more. Paul Graves has 1 emails and 2 mobile phone numbers on RocketReach.
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