Neo Xiao's Location
Shanghai, China
Neo Xiao's Work
- GPGPU Core Design Engineer @ Iluvatar CoreX 天数智芯
- Principal Engineer @ Huawei
- Senior Staff Engineer @ NextVPU
Neo Xiao's Education
- Tongji University
Master's Degree (Electrical and Electronics Engineering)
2008 - 2011 - Hunan University
Bachelor's Degree (Electrical and Electronics Engineering)
2004 - 2008
Neo Xiao's Skills
- RTL coding
- Static Timing Analysis
- Verilog
- SystemVerilog
- ASIC
- RTL design
- Simulations
- IC front-end
- Design + Verification
- C++
Neo Xiao's Summary
Neo Xiao, based in Shanghai, China, is currently a GPGPU Core Design Engineer at Iluvatar CoreX 天数智芯, bringing experience from previous roles at 华为, NextVPU, IBM and China Academy of Science Shanghai. Neo Xiao holds a 2008 - 2011 Master's Degree in Electrical and Electronics Engineering @ Tongji University. With a robust skill set that includes RTL coding, Static Timing Analysis, Verilog, SystemVerilog, ASIC and more, Neo Xiao contributes valuable insights to the industry. Neo Xiao has 2 emails on RocketReach.
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