Hancy Han Email
Director, ASIC Verification @ Iluvatar CoreX 天数智芯
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Hancy Han Location
- Shanghai, China
Hancy Han Work
- Director, ASIC Verification @ (March 2018 - Present)
- Manager, GFXIP Verification @ (April 2016 - February 2018)
- Section Manager, GFXIP Verification @ (January 2014 - March 2016)
- Senior Engineer, GFXIP Verification @ (July 2012 - December 2013)
- Senior ASIC Engineer @ (March 2008 - July 2012)
Hancy Han Education
- Shanghai Jiao Tong University 2005-2008
- Nanjing University of Posts and Telecommunications 2001-2005
Hancy Han Skills
- RTL design
- SoC
- ASIC
- Timing Closure
- SystemVerilog
- Verilog
- Static Timing Analysis
- VMM
- RTL coding
- VLSI
- Integrated Circuit Design
- Hardware Architecture
- Integrated Circuit
- 功能验证
- 计算机架构
Hancy Han Summary
- Hancy Han, based in Shanghai, China, is currently a Director, ASIC Verification at 天数智芯 Iluvatar. Hancy Han brings experience from previous roles at AMD and NVIDIA. Hancy Han holds a 2005 - 2008 Shanghai Jiao Tong University. With a robust skill set that includes RTL design, SoC, ASIC, Timing Closure, SystemVerilog and more. Hancy Han has 1 emails on RocketReach.
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