Hancy Han Location
Shanghai, China
Hancy Han Work
- 2018 - now Director, ASIC Verification @ Iluvatar CoreX 天数智芯
- 2016 - 2018 Manager, GFXIP Verification @ AMD
- 2014 - 2016 Section Manager, GFXIP Verification @ AMD
Hancy Han Education
- Shanghai Jiao Tong University2005 - 2008
- Nanjing University of Posts and Telecommunications2001 - 2005
Hancy Han Skills
- RTL design
- SoC
- ASIC
- Timing Closure
- SystemVerilog
- Verilog
- Static Timing Analysis
- VMM
- RTL coding
- VLSI
Hancy Han Summary
Hancy Han, based in Shanghai, China, is currently a Director, ASIC Verification at 天数智芯 Iluvatar. Hancy Han brings experience from previous roles at AMD and NVIDIA. Hancy Han holds a 2005 - 2008 Shanghai Jiao Tong University. With a robust skill set that includes RTL design, SoC, ASIC, Timing Closure, SystemVerilog and more. Hancy Han has 1 emails on RocketReach.
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Hancy Han
Director, ASIC Verification at 天数智芯 Iluvatar
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