Naveen Srivastava's Location
Santa Clara, CA, US
Naveen Srivastava's Work
- Principal Engineer @ NVIDIA
- Member of Technical Staff - Level 2 @ eInfochips (An Arrow Company)
- Project Manager @ Cyient
- Sr. Staff Engineer @ Broadcom
- MTS @ AMD
- Senior Design Engineer @ STMicroelectronics
Naveen Srivastava's Education
- Indian Institute of Technology (Banaras Hindu University), Varanasi
M.Tech (Microelectronics Engineering)
2000 - 2002 - Madan Mohan Malaviya Engineering College (MMMEC)
B.E (Electronics & Communication Engineering)
1996 - 2000
Naveen Srivastava's Skills
- Microarchitecture
- RTL design
- RTL coding
- Verilog
- Simulations
- SoC
- VLSI
- SystemVerilog
- Static Timing Analysis
- VHDL
Naveen Srivastava's Summary
Naveen Srivastava, based in Santa Clara, CA, US, is currently a Principal Engineer at NVIDIA, bringing experience from previous roles at eInfochips, Cyient, Broadcom and AMD. Naveen Srivastava holds a 2000 - 2002 M.Tech in Microelectronics Engineering @ Indian Institute of Technology (Banaras Hindu University), Varanasi. With a robust skill set that includes Microarchitecture, RTL design, RTL coding, Verilog, Simulations and more, Naveen Srivastava contributes valuable insights to the industry. Naveen Srivastava has 4 emails on RocketReach.
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