Bachelor of Engineering (Electronics and Communications)
1996 - 2000
Atomic Energy Central School
1984 - 1994
Narender Hanchate's Skills
EDA
Static Timing Analysis
Circuits
VLSI
ASIC
Algorithms
Signal Integrity
TCL
Physical Design
Verilog
Narender Hanchate's Summary
Narender Hanchate, based in San Jose, CA, US, is currently a Sr. Software Architect at Cadence Design Systems, bringing experience from previous roles at Cadence Design Systems, Tabula and Samsung Semiconductor. Narender Hanchate holds a 2003 - 2006 Ph.D. in Computer Engineering @ University of South Florida. With a robust skill set that includes EDA, Static Timing Analysis, Circuits, VLSI, ASIC and more, Narender Hanchate contributes valuable insights to the industry. Narender Hanchate has 2 emails on RocketReach.