Maxime Joubert Email
Ingénieur hardware @ Arteris
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Maxime Joubert Location
- Paris, FR
Maxime Joubert Work
- Ingénieur hardware @ (November 2023 - Present)
- Digital Design Engineer @ (April 2021 - October 2023)
- SoC and IP Engineer @ (March 2018 - November 2020)
- Ingenieur FPGA @ (November 2017 - February 2018)
- Ingénieur FPGA - Traitement vidéo @ (April 2017 - November 2017)
- Ingénieur FPGA @ (February 2017 - April 2017)
- Ingénieur FPGA - Traitement vidéo @ (September 2016 - January 2017)
- Internship : Développement d'une interface 3GSDI sur FPGA avec vérification UVM @ (February 2016 - August 2016)
Maxime Joubert Education
- ESIEE PARIS 2010-2016
- Vysoké učení technické v Brně
(Ingénierie électrique et électronique)
2015-2015 - Albert de Mun
Baccalauréat S
2003-2010
Maxime Joubert Skills
- VHDL
- FPGA
- SoC
- Quartus
- Xilinx
- Vivado
- ModelSim
- Circuits intégrés
- Electronics
- PHP
- Java
- C language
- Microsoft Office
- Symphony
- SQL
- Mac OS
- English
- Électronique
Maxime Joubert Summary
- Maxime Joubert, based in Paris, FR, is currently a Ingénieur hardware at Arteris. Maxime Joubert brings experience from previous roles at SCALINX, Nokia and Elsys Design. Maxime Joubert holds a 2010 - 2016 ESIEE PARIS. With a robust skill set that includes VHDL, FPGA, SoC, Quartus, Xilinx and more. Maxime Joubert has 1 emails on RocketReach.
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