Martin Kudlich Email & Phone Number
Design Verification Engineer @ Kepler Computing
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Martin Kudlich Location
- Roseburg, OR, US
Martin Kudlich Work
- Design Verification Engineer @ (August 2026 - Present)
- Design Verification Engineer @ (May 2026 - August 2026)
- Design Verification Engineer @ (January 2022 - April 2026)
- Design Verification Engineer @ (June 2020 - January 2022)
- Pre-Silicon Validation Engineer @ (April 2020 - May 2020)
- Engineering Manager @ (October 2013 - April 2020)
- Staff Engineer @ (May 2012 - October 2013)
- Hardware Engineer @ (March 2005 - April 2012)
- Hardware Engineer @ (October 2004 - March 2005)
- Hardware Engineer @ (April 2001 - February 2004)
- Staff @ (January 1999 - March 2001)
- Staff @ (March 1997 - August 1998)
- Student @ (October 1996 - February 1997)
- Hardware Engineer @ (April 1991 - September 1996)
Martin Kudlich Education
- University of Technology Vienna
Dipl. Ing. (Electrical Engineering)
1983-1990
Martin Kudlich Skills
- ASIC
- Computer Architecture
- Universal Verification Methodology (UVM)
- SystemVerilog
- Technical Leadership
- Leadership
- Debugging
- System on a Chip (SoC)
- Engineering
- Computer Hardware
Martin Kudlich Summary
- Martin Kudlich, based in Roseburg, OR, US, is currently a Design Verification Engineer at Kepler Computing. Martin Kudlich brings experience from previous roles at my new employer, Cornami, Inc., Apple and Intel Corporation. Martin Kudlich holds a 1983 - 1990 Dipl. Ing. in Electrical Engineering @ University of Technology Vienna. With a robust skill set that includes ASIC, Computer Architecture, Universal Verification Methodology (UVM), SystemVerilog, Technical Leadership and more. Martin Kudlich has 1 mobile phone numbers on RocketReach.
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