Darshak Doshi Email & Phone Number
Senior Principal Design Engineer @ Kepler Computing
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Darshak Doshi Location
- San Jose, CA, US
Darshak Doshi Work
- 2026 -now Senior Principal Design Engineer @
- 2020 -2026 Principal Design Engineer @
- 2026 -now Senior Principal Design Engineer @ Stealth Mode Startup Company
- 2014 -2020 SoC Design Engineer @
- 2013 -2013 Engineering Coop @
- 2020 -2026 Principal Design Engineer @ Stealth Mode Startup Company
- 2013 -2013 Engineering EDA Intern @
- 2010 -2011 Industrial Trainee @
Darshak Doshi Education
- Georgia Tech
Master of Science (M.S.) (Electrical and Computer Engineering)
2012-2014 - University of Mumbai
Bachelor of Engineering (B.E.) (Electrical and Electronics Engineering)
2008-2012
Darshak Doshi Skills
- C++
- Cadence Virtuoso
- Verilog
- C
- Matlab
- Pspice
- VHDL
- Microsoft Office
- Microsoft Excel
- Linux
- Keil
- Samba
- ASIC
- VLSI
- ModelSim
- Circuit Design
- Cadence
- CMOS
- IC
- Perl
- Computer Architecture
- Synopsys tools
- Python
- FPGA
- Microprocessors
- TCL
- Hardware Architecture
- Physical Design
- Digital Circuit Design
- Low-power Design
- Xilinx
- RTL Design
- EDA
- Integrated Circuit Design
- Static Timing Analysis
- Timing Closure
Darshak Doshi Summary
- Darshak Doshi, based in San Jose, CA, US, is currently a Senior Principal Design Engineer at Kepler Computing. Darshak Doshi brings experience from previous roles at Kepler Computing, Stealth Mode Startup Company, Intel Corporation and AMD. Darshak Doshi holds a 2012 - 2014 Master of Science (M.S.) in Electrical and Computer Engineering @ Georgia Tech. With a robust skill set that includes C++, Cadence Virtuoso, Verilog, C, Matlab and more. Darshak Doshi has 2 emails and 1 mobile phone numbers on RocketReach.
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