Mark Noble Email
FPGA Design Consultant @ Toshiba Research Europe Limited
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Mark Noble Location
- Sunderland, GB
Mark Noble Work
- 2019 - 2021 Contract FPGA Design Engineer @
- 2022 - now FPGA Design Consultant @
- 2022 - 2022 FPGA Design Consultant @
- 2019 - 2019 FPGA Design Engineer (Contractor) @
- 2018 - 2019 FPGA and ASIC Design engineer @
- 2016 - 2017 Consultant FPGA Design Engineer @
- 2015 - 2015 FPGA Design Consultant @
- 2015 - 2015 FPGA Design Consultant @
- 2014 - 2014 FPGA Design Consultnt @
- 2013 - 2014 Consultant FPGA Verification Engineer @
- 2012 - 2013 Consultant FPGA design engineer @
- 2011 - 2012 Consultant FPGA Engineer @
- 2011 - 2011 Consultant FPGA Engineer @
- 2000 - 2007 Senior Applications Engineer @
- 2012 - now Owner and Consultant @ FPGA Design Solutions
- 2021 - 2022 Contract FPGA Consultant @
- 2021 - 2021 Contract or FPGA Design Engineer @ L3Harris
- 2021 - 2021 Contractor FPGA Design Engineer @ Allen-Vanguard UK
- 2018 - 2018 FPGA Firmware Design Engineer (Contract) @
- 2014 - 2015 FPGA Contract Design Engineer @
- 2012 - 2012 Consultant ASIC and FPGA verification engineer @
- 2011 - 2011 Consultant FPGA engineer @
- 2010 - 2010 Consultent FPGA Verification Engineer @
- 2007 - 2009 Senior FPGA Engineer @
Mark Noble Education
- University of Northumbria
Bachelor of Engineering (BEng) (Electrical and Electronics Engineering)
1996 - 1999 - Edinburgh University
Bachelor of Engineering (BEng) (Electrical and Electronics Engineering)
1995 - 1996
Mark Noble Skills
- FPGA Design / Architecturing / Debug / Prototyping
- High Speed serial interfaces
- Verilog
- VHDL
- Schematic Capture
- PCI Express
- Ethernet
- Hardware Debug
- High Speed design
- PCIe
- Debugging
- System Verilog
- PCB design
- ASIC
- CPLD
- Hardware
- Bluetooth
- Microcontrollers
- System Design
- FPGA
- Xilinx
- Low-power Design
- Simulations
- SystemVerilog
- Hardware Architecture
- Electronics
- RTL design
- Digital Signal Processors
- Embedded Software
- Signal Integrity
- ModelSim
- SoC
- IC
- ARM
- Semiconductors
- Integrated Circuit Design
- Processors
- Altera
- Digital Electronics
- Circuit Design
- Microprocessors
- I2C
- USB
- Device Drivers
- System Architecture
- Firmware
- Functional Verification
- TCL
- RTOS
- EDA
- Fpga Design
- Debug
- Architecturing
- Design
- Low Power Design
- Prototyping
Mark Noble Summary
- Mark Noble, based in Sunderland, GB, is currently a FPGA Design Consultant at Toshiba Research Europe Limited. Mark Noble brings experience from previous roles at Leonardo, Hydrix, Ascend Diagnostics and Titan IC Systems. Mark Noble holds a 1996 - 1999 Bachelor of Engineering (BEng) in Electrical and Electronics Engineering @ University of Northumbria. With a robust skill set that includes FPGA Design / Architecturing / Debug / Prototyping, High Speed serial interfaces, Verilog, VHDL, Schematic Capture and more. Mark Noble has 1 emails on RocketReach.
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