1994 -
2009 CAD Engineer and IC Layout Designer @ Micron
1990 -
1994 Layout Designer @
1988 -
1990 Layout Designer @ Arizona MicroTech
1982 -
1988 Layout Designer @ Clark IC Design
Mark Jacobsen Education
Mesa Community College
General Education (Drafting, Math, Physics)
1982
-
1984
Brigham Young University
General Education
1980
-
1982
Mark Jacobsen Skills
Hercules
DRC
CMOS
Mixed Signal
IC
IC layout
Physical Verification
Cadence Virtuoso
Analog
ASIC
SRAM
Cadence
LVS
Floorplanning
BiCMOS
Code
CAD
Kirkpatrick
Mark Jacobsen Summary
Mark Jacobsen, based in Garden City, ID, US, is currently a Senior CAD Engineer at Micron Technology. Mark Jacobsen brings experience from previous roles at Micron Technology, Micron and ST Microelectronics. Mark Jacobsen holds a 1982 - 1984 General Education in Drafting, Math, Physics @ Mesa Community College. With a robust skill set that includes Hercules, DRC, CMOS, Mixed Signal, IC and more. Mark Jacobsen has 4 emails and 1 mobile phone numbers on RocketReach.
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