Mark Graumlich Location
- San Jose, CA, US
Mark Graumlich Work
- 2018 - now Field Applications Engineer @
- 2015 - 2018 Senior Analog Design Engineer @
- 2011 - 2014 Analog Design Engineer @
- 1998 - 2009 Analog and Mixed Signal Design Engineer @
Mark Graumlich Education
- University of Cincinnati
BSEE
- University of Colorado Boulder
Mark Graumlich Skills
- Mixed Signal
- Analog Circuit Design
- CMOS
- Semiconductors
- Analog
- ASIC
- VLSI
- IC
- Circuit Design
- SoC
- EDA
- Cadence Virtuoso
- PLL
- Power Management
- Cadence Spectre
- Integrated Circuit Design
- Cadence
- Verilog-A
- Phase-Locked Loop (PLL)
- Application-Specific Integrated Circuits (ASIC)
- Spectre
- Verilog-AMS
- BiCMOS
- Power Converters
- Python
- Verilog Ams
- Application Specific Integrated Circuits Asic
- Phase Locked Loop Pll
- Phase Locked Loop
- Application Specific Integrated Circuits
Mark Graumlich Summary
- Mark Graumlich, based in San Jose, CA, US, is currently a Field Applications Engineer at Teledyne LeCroy. Mark Graumlich brings experience from previous roles at FINsix Corporation, Texas Instruments and LSI. Mark Graumlich holds a BSEE @ University of Cincinnati. With a robust skill set that includes Mixed Signal, Analog Circuit Design, CMOS, Semiconductors, Analog and more. Mark Graumlich has 3 emails and 2 mobile phone numbers on RocketReach.
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Mark Graumlich
Field Applications Engineer
San Jose, CA, US
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