Manuj Patel Email & Phone Number
Senior Principal Engineer @ NXP Semiconductors
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Manuj Patel Location
- Noida, UP, IN
Manuj Patel Work
- 2025 -now Senior Principal Engineer @
- 2020 -2025 Staff Engineer - SOC Verification @
- 2018 -2020 Sr. Lead Engineer @
- 2016 -2018 SoC Verification Engineer @
- 2011 -2016 Senior ASIC and SoC Verification Engineer @
Manuj Patel Education
- Uttar Pradesh Technical University
Bachelor of Technology - BTech (Electrical and Electronics Engineering)
2006-2010
Manuj Patel Skills
- SystemVerilog
- UVM
- ASIC
- Application Specific Integrated Circuits Asic
- FPGA
- VLSI
- Verilog
- SoC
- Open Verification Methodology
- VHDL
- Perl
- ModelSim
- C
- C++
- System On A Chip Soc
- System Verilog
- Functional Verification
- OVM
- RTL design
- System on a Chip
- Application Specific Integrated Circuits
Manuj Patel Summary
- Manuj Patel, based in Noida, UP, IN, is currently a Senior Principal Engineer at NXP Semiconductors. Manuj Patel brings experience from previous roles at Qualcomm, Intel Corporation and Wipro Technologies. Manuj Patel holds a 2006 - 2010 Bachelor of Technology - BTech in Electrical and Electronics Engineering @ Uttar Pradesh Technical University. With a robust skill set that includes SystemVerilog, UVM, ASIC, Application Specific Integrated Circuits Asic, FPGA and more. Manuj Patel has 1 emails and 1 mobile phone numbers on RocketReach.
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