Loic Vezier Email
SoC Architect @ Silicon Mobility
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Loic Vezier Location
- Nice, FR
Loic Vezier Work
- 2022 -now SoC Architect @
- 2015 -2022 AxEC and FPGA and Tools Technical Lead @
- 2004 -2015 Senior SoC and FPGA Design Engineer @ Scaleo chip
- 2001 -2004 Ingénieur en micro-électronique @
Loic Vezier Education
- ISIMA - Clermont Auvergne INP
Ingénieur en informatique des systèmes embarqués (Informatique des Systèmes Embarqués)
1998-2001 - Lycée Pierre Corneille - Rouen
Classes péparatoires PSI*
1996-1998
Loic Vezier Skills
- ARM
- Altera Quartus
- AXI
- Microsoft Office
- Timing Analysis
- System Testing
- Perl Script
- AMBA AHB
- Architecture Arm
- Altera
- FPGA
- Arm Cortex R5
- ModelSim
- Embedded Software
- Embedded Systems
- Altera Qsys
- Ethernet IP
- Semi Conducteur
- Strategic Planning
- Synplify Pro
- Perl
- FPGA prototyping
- Simulations
- VHDL
- Numerical Simulation
- Project Management
- RTL design
- DDR2
- ASIC
- SoC
- Verilog
- Manufacturing
- Arm Cortex M3
- Apb
Loic Vezier Summary
- Loic Vezier, based in Nice, FR, is currently a SoC Architect at Silicon Mobility. Loic Vezier brings experience from previous roles at Silicon Mobility, Scaleo chip and Actsoft. Loic Vezier holds a 1998 - 2001 Ingénieur en informatique des systèmes embarqués in Informatique des Systèmes Embarqués @ ISIMA - Clermont Auvergne INP. With a robust skill set that includes ARM, Altera Quartus, AXI, Microsoft Office, Timing Analysis and more. Loic Vezier has 1 emails on RocketReach.
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