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Lijo Thomas Location
San Jose, CA, US
Lijo Thomas Work
2022 -now Sr ASIC Engineer @
2016 -2022 DFT and DFD Design Verification Engineer @
2014 -2016 Product Development Engineer @
2012 -2014 Digital Design Engineer @
2011 -2012 Graduate Technical Intern @
Lijo Thomas Education
National Institute of Technology Calicut
Master of Technology (M.Tech.) (Microelectronics and VLSI Design)
2010-2012
Cochin University of Science and Technology
Lijo Thomas Skills
Development
Front End Rtl and Formal Verification
Vhdl Coding
Microprocessor Assembly Coding
Perl Coding
Rtl Compiler
Platform
Front End and Back End Simulator Tools
RTL design
Matlab
DFT
Vcs Infrastructure and Rtl Signal Tracking
Verilog
Integrated Circuit Design
Xilinx
Validation and Verification Along With Dfx Features
Structural
C and C++ Coding
Svn Revision Control
SoC
Various Eda Tools Like Vcs Compiler
VHDL
ModelSim
Verilog Coding
Content Development
Validation and Assertions
SystemVerilog
Product Development
Dsp Programming
Soc/Ip Design
Very Large Scale Integration Vlsi
System Verilog Coding
Very Large Scale Integration
Lijo Thomas Summary
Lijo Thomas, based in San Jose, CA, US, is currently a Sr ASIC Engineer at NVIDIA. Lijo Thomas brings experience from previous roles at Intel Corporation. Lijo Thomas holds a 2010 - 2012 Master of Technology (M.Tech.) in Microelectronics and VLSI Design @ National Institute of Technology Calicut. With a robust skill set that includes Development, Front End Rtl and Formal Verification, Vhdl Coding, Microprocessor Assembly Coding, Perl Coding and more. Lijo Thomas has 2 emails and 1 mobile phone numbers on RocketReach.
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