Laercio Sawabe Email
Digital IC Designer @ Chipus Microelectronics
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Laercio Sawabe Location
- Brazil
Laercio Sawabe Work
- 2021 -now Digital IC Designer @
- 2020 -2021 Digital IC Designer @
- 2010 -2020 Digital Designer @
- 2008 -2009 Digital IC Designer @ IC Brazil Program - Cadence Design Systems
- 2006 -2007 Software Designer @
- 2004 -2005 Support Technician @ Informatics Center - UFPEL
Laercio Sawabe Education
- IC Brazil - Cadence Design Systems
Digital IC Designer (Digital Systems Design)
2008-2009 - Universidade Federal de Pelotas
BSc (Computer Science)
2002-2006 - Centro Federal de Educação Tecnológica de Pelotas
Electronics Technician (Electronics)
2002-2003 - Federal University of Rio Grande do Sul
MSc - locked (Computer Science)
2007
Laercio Sawabe Skills
- VHDL
- Verilog
- FPGA
- ASIC
- Lua
- ModelSim
- RTL design
- TCL
- Xilinx
- Cadence Virtuoso
- Microelectronics
- Python
- Encounter
- NCSim
- NC-Verilog
- Power Analysis
- TTL
- HSpice
- Quartus
- Leonardo Spectrum
- Linux
- Embedded Systems
- Electronics
- Simulations
- Testing
- C
- Field-Programmable Gate Arrays (FPGA)
- Application-Specific Integrated Circuits (ASIC)
- C++
- Ethernet
Laercio Sawabe Summary
- Laercio Sawabe, based in Brazil, is currently a Digital IC Designer at Chipus Microelectronics. Laercio Sawabe brings experience from previous roles at Chipus Microelectronics, Datacom, IC Brazil Program - Cadence Design Systems and Bank of Caixa Economica Federal. Laercio Sawabe holds a 2008 - 2009 Digital IC Designer in Digital Systems Design @ IC Brazil - Cadence Design Systems. With a robust skill set that includes VHDL, Verilog, FPGA, ASIC, Lua and more. Laercio Sawabe has 2 emails on RocketReach.
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