Kostas Adaos Email
SoC Architect @ Euclyd
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Kostas Adaos Location
- Graz, AT
Kostas Adaos Work
- SoC Architect @ (May 2025 - Present)
- Principal Digital Design and Firmware Engineer @ (October 2014 - April 2025)
- CTO @ DIAPLOUS Ltd (January 2005 - October 2014)
- Lab and Teaching Assistant @ (January 1994 - October 2014)
- IC Engineer @ ATMEL (January 2001 - January 2006)
- Applications Engineer @ Intel - Giga Hellas (December 2000 - December 2001)
- FPGA and HW engineer @ Synergy Systems (January 1996 - June 1998)
Kostas Adaos Education
- University of Patras
Diploma (Computer Engineering)
1988-1993
Kostas Adaos Skills
- FPGA
- RTL design
- Xilinx
- ModelSim
- Verilog
- Algorithms
- Embedded Systems
- Integrated Circuit Design
- VHDL
- VLSI
- Digital Signal Processors
- SoC
- ASIC
- IC
- Computer Architecture
- Computer Vision
- Microcontrollers
- Assembly Language
- Xilinx ISE
- Sensors
- Computer Engineering
- EDA
- Leadership
- Strategic Planning
- Microsoft Excel
- Field Programmable Gate Arrays
- Application Specific Integrated Circuits
- Integrated Circuits
- Very Large Scale Integration
- System on a Chip
- Digital IC Design
- SystemVerilog
- Universal Verification Methodology
- Power Management
- Spmi
- I2c
- SPI
- ARM Architecture
- Firmware
Kostas Adaos Summary
- Kostas Adaos, based in Graz, AT, is currently a SoC Architect at Euclyd. Kostas Adaos brings experience from previous roles at Renesas Electronics, DIAPLOUS Ltd, University of Patras and ATMEL. Kostas Adaos holds a 1988 - 1993 Diploma in Computer Engineering @ University of Patras. With a robust skill set that includes FPGA, RTL design, Xilinx, ModelSim, Verilog and more. Kostas Adaos has 2 emails on RocketReach.
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