Kin Lee Email & Phone Number
Senior Principal Engineer @ Marvell India
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Kin Lee Location
- Santa Clara, CA, US
Kin Lee Work
- 2022 -now Senior Principal Engineer @
- 2021 -2022 Senior DV Engineer @
- 2018 -2021 Principal Engineer @
- 2012 -2018 Senior Staff Engineer @
- 2009 -2012 Senior Engineer @
- 2008 -2009 DV Engineer @ ZeroG wireless
- 2007 -2008 Engineer @
- 1997 -2007 Design Engineer @
- 2007 -2007 engineer @ QThink
Kin Lee Education
- University of Southern California
- UCLA
BSEE
- University of Southern California
MSEE
1998 - San José State University
Kin Lee Skills
- SoC
- SystemVerilog
- Verilog
- PCIe
- SATA
- ARM CPU
- Functional Verification
- FPGA
- AMBA AHB
- AXI
- ModelSim
- VMM
- Verilog-AMS
- NVM express
- C/C++
- Perl Script
- UVM
- Perl
- C++
- Debugging
- Verilog Ams
Kin Lee Summary
- Kin Lee, based in Santa Clara, CA, US, is currently a Senior Principal Engineer at Marvell Technology. Kin Lee brings experience from previous roles at Amazon, Marvell Technology, SK hynix memory solutions inc. and Marvell. Kin Lee holds a University of Southern California. With a robust skill set that includes SoC, SystemVerilog, Verilog, PCIe, SATA and more. Kin Lee has 3 emails and 5 mobile phone numbers on RocketReach.
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