Kin Lee Email & Phone Number
Senior Principal Engineer @ Marvell India
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Kin Lee Location
- Santa Clara, CA, US
Kin Lee Work
- Senior Principal Engineer @ (January 2022 - Present)
- Senior DV Engineer @ (January 2021 - December 2022)
- Principal Engineer @ (January 2018 - December 2021)
- Senior Staff Engineer @ (January 2012 - December 2018)
- Senior Engineer @ (January 2009 - December 2012)
- DV Engineer @ ZeroG wireless (January 2008 - December 2009)
- Engineer @ (January 2007 - December 2008)
- Design Engineer @ (May 1997 - March 2007)
- engineer @ QThink (January 2007 - December 2007)
Kin Lee Education
- University of Southern California
MS (Biomedical Engineering (Medical Imaging and Imaging Informatics))
- San José State University
MS (Computer Science)
- UCLA
BSEE
- University of Southern California
MSEE
1998
Kin Lee Skills
- SoC
- SystemVerilog
- Verilog
- PCIe
- SATA
- ARM CPU
- Functional Verification
- FPGA
- AMBA AHB
- AXI
- ModelSim
- VMM
- Verilog-AMS
- NVM express
- C/C++
- Perl Script
- UVM
- Perl
- C++
- Debugging
- Verilog Ams
Kin Lee Summary
- Kin Lee, based in Santa Clara, CA, US, is currently a Senior Principal Engineer at Marvell Technology. Kin Lee brings experience from previous roles at Amazon, Marvell Technology, SK hynix memory solutions inc. and Marvell. Kin Lee holds a MS in Biomedical Engineering (Medical Imaging and Imaging Informatics) @ University of Southern California. With a robust skill set that includes SoC, SystemVerilog, Verilog, PCIe, SATA and more. Kin Lee has 3 emails and 5 mobile phone numbers on RocketReach.
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