Keming Wang Email & Phone Number
Principal DFT Engineer @ Sintegra Inc.
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Keming Wang Location
- Santa Clara, CA, US
Keming Wang Work
- Principal DFT Engineer @ (May 2025 - Present)
- DFT Design Engineer @ (February 2021 - July 2024)
- Design Engineer Sr. Staff @ (June 2018 - January 2021)
- Staff Design Engineer @ (December 2016 - June 2018)
- Sr. Principal - IC Design @ (August 2012 - December 2016)
- SMTS Scan and DFT @ (July 2011 - November 2012)
- ASIC DFT Tech Leader @ (January 2004 - July 2011)
- Tech Leader ASIC DFT @ Cisco System Inc. (January 2004 - January 2011)
- Staff Engineer @ (December 2002 - September 2004)
- Staff Engineer @ Agilent Technology Inc. (January 2002 - January 2004)
- Staff Engineer @ Redswitch (January 2000 - January 2002)
Keming Wang Education
- Technische Universität Berlin
(Electronic Engineering)
1988-1989 - 东南大学
Master (E.E.)
Keming Wang Summary
- Keming Wang, based in Santa Clara, CA, US, is currently a Principal DFT Engineer at Sintegra Inc.. Keming Wang brings experience from previous roles at Intel Corporation, Marvell Semiconductor, Cavium Inc and Broadcom. Keming Wang holds a 1988 - 1989 Technische Universität Berlin. Keming Wang has 2 emails and 4 mobile phone numbers on RocketReach.
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