Joseph Trapasso's Location
San Jose, CA, US
Joseph Trapasso's Work
- Senior Asic Design Engineer @ NVIDIA
- Verif Engineer @ NVIDIA
- 3d Performance Architect at Nvidia @ NVIDIA
- Performance Architect @ AMD
- Hardware Intern @ NVIDIA
- Architecture Intern @ NVIDIA
- Nuclear Engineering Intern @ Westinghouse Electric Company
- Radiation Safety Officer Intern @ Westinghouse Electric Company
Joseph Trapasso's Education
- Carnegie Mellon University
Masters (Computer Engineering)
2002 - 2006 - Greensburg Salem High School1998 - 2002
Joseph Trapasso's Skills
- Low Power Design
- RTL verification
- ASIC
- Computer Architecture
- Perl
- Verilog
- C++
- C
- RTL design
- Processors
Joseph Trapasso's Summary
Joseph Trapasso, based in San Jose, CA, US, is currently a Senior Asic Design Engineer at Nvidia, bringing experience from previous roles at Nvidia and Amd. Joseph Trapasso holds a 2002 - 2006 Masters in Computer Engineering @ Carnegie Mellon University. With a robust skill set that includes Low Power Design, RTL verification, ASIC, Computer Architecture, Perl and more, Joseph Trapasso contributes valuable insights to the industry. Joseph Trapasso has 3 emails and 1 mobile phone number on RocketReach.
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