Jonathan Choy's Location
California, United States
Jonathan Choy's Work
- Senior IP Design Engineer - Pixel IP @ Apple
- ASIC Design Engineer - CPU Implementation and PD @ Apple
- Sr Design Engineer @ AMD
- CAD Co-op and Intern Engineer @ AMD
Jonathan Choy's Education
- University of California, Berkeley
Master of Science (MS)
2001 - 2003 - University of California, Berkeley
Bachelor of Science (BS)
1997 - 2001
Jonathan Choy's Skills
- IC
- Microprocessors
- Timing Closure
- Logic Design
- Silicon
- ASIC
- SoC
- Verilog
- Engineering
- Static Timing Analysis
Jonathan Choy's Summary
Jonathan Choy, based in California, United States, is currently a Senior IP Design Engineer - Pixel IP at Apple, bringing experience from previous roles at Apple and Advanced Micro Devices. Jonathan Choy holds a 2001 - 2003 Master of Science (MS) @ University of California, Berkeley. With a robust skill set that includes IC, Microprocessors, Timing Closure, Logic Design, Silicon and more, Jonathan Choy contributes valuable insights to the industry. Jonathan Choy has 3 emails and 1 mobile phone number on RocketReach.
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