John Fu Email
Principal Engineer - Digital IC Design @ Marvell India
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John Fu Location
- Canada
John Fu Work
- 2022 -now Principal Engineer - Digital IC Design @
- 2017 -2022 SMTS ASIC Design Engineer @
- 2015 -2017 Senior II Digital Design Engineer @
- 2011 -2015 Sr. ASIC Design Engineer @
- 2008 -2011 Sr. ASIC Design Engineer @
- 2004 -2008 ASIC Design Engineer @
John Fu Education
- University of Windsor
Ph.D Candidate (Electrical and Computer Engineering)
1999-2004 - Xidian University
Master of Applied Science (Electrical Engineering)
1995-1998 - Dalian University of Technology
Bachelor of Engineering (Electrical Engineering)
1989-1993
John Fu Skills
- ASIC
- Verilog
- SystemVerilog
- SoC
- IC
- Functional Verification
- VHDL
- Low-power Design
- FPGA
- Primetime
- CMOS
- Spyglass
- RTL Design
- Embedded Systems
- Processors
- Tetramax
- Timing
- VLSI
- EDA
- Logic Synthesis
- Conformal LEC
- Lower Power Methodology
- UPF CFP Power Flow
- PCIe USB SATA Serdes Design
- Field Programmable Gate Arrays Fpga
- Consumer Electronics
- Design
- Low Power Design
John Fu Summary
- John Fu, based in Canada, is currently a Principal Engineer - Digital IC Design at Marvell Technology. John Fu brings experience from previous roles at AMD, Synopsys Inc, Qualcomm and Sigma Designs. John Fu holds a 1999 - 2004 Ph.D Candidate in Electrical and Computer Engineering @ University of Windsor. With a robust skill set that includes ASIC, Verilog, SystemVerilog, SoC, IC and more. John Fu has 2 emails on RocketReach.
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