Jing Lu Email & Phone Number
Mixed Signal, Digital Design and Verification @ Renesas Electronics
5 free lookup(s).
Jing Lu Location
- California, United States
Jing Lu Work
- 2017 -now Mixed Signal, Digital Design and Verification @
- 2015 -2017 Sr. Staff Engineer @
- 2007 -2016 Staff Engineer @
- 2003 -2007 Sr. MTS @
- 1996 -2002 Sr. Design Engr. @
Jing Lu Education
- Stanford University 1996-1998
- Portland State University 1995-1996
- Peking University
Jing Lu Skills
- IC
- Verilog
- ASIC
- System Verilog
- OVM
- SoC
- Semiconductors
- FPGA
- Digital Signal Processors
- Integrated Circuit Design
- Debugging
- RTL Design
- VLSI
- PCIe
- Embedded Systems
- Design
- Software
- Verification
Jing Lu Summary
- Jing Lu, based in California, United States, is currently a Mixed Signal, Digital Design and Verification at Renesas Electronics. Jing Lu brings experience from previous roles at Marvell Semiconductor, Avago Tech (LSI Corporation), Agere System and AMD. Jing Lu holds a 1996 - 1998 Stanford University. With a robust skill set that includes IC, Verilog, ASIC, System Verilog, OVM and more. Jing Lu has 4 emails and 2 mobile phone numbers on RocketReach.
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