Jia Zeng's Location
Hillsboro, OR, US
Jia Zeng's Work
- Sr Principal Application Engineer @ Cadence Design Systems
- SoC Design Engineer @ Intel Corporation
- Component Design Engineer @ Intel Corporation
- Hardware Engineer @ Algotochip
Jia Zeng's Education
- USC
Master's degree (Electrical and Electronics Engineering)
2011 - 2013 - Donghua University2007 - 2011
Jia Zeng's Skills
- VLSI
- Verilog
- Computer Architecture
- Analog Circuit Design
- C
- ASIC
- Perl
- RTL design
- Cadence Spectre
- C++
Jia Zeng's Summary
Jia Zeng, based in Hillsboro, OR, US, is currently a Sr Principal Application Engineer at Cadence Design Systems, bringing experience from previous roles at 英特尔, Intel Corporation and Algotochip. Jia Zeng holds a 2011 - 2013 Master's degree in Electrical and Electronics Engineering @ USC. With a robust skill set that includes VLSI, Verilog, Computer Architecture, Analog Circuit Design, C and more, Jia Zeng contributes valuable insights to the industry. Jia Zeng has 3 emails on RocketReach.
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