Jei Narayanan Email & Phone Number
Head-VLSI @ UST
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Jei Narayanan Location
- Bengaluru, KA, IN
Jei Narayanan Work
- 2026 -now Head-VLSI @
- 2024 -2026 Global Operations Director -Semiconductor Business @
- 2023 -2024 Head-VLSI @
- 2022 -2023 AVP @
- 2019 -2022 Global Operations Director -Semiconductor Business @
- 2015 -2019 COO @
- 2011 -2015 Practice Head - VLSI and System Design @
- 2011 -2011 Group Head- Semiconductor and System BU @
- 2010 -2010 Group Head -Semiconductor and System BU @
- 2009 -2010 Group Head-Semiconductor and System BU @
- 2008 -2008 Group Head-Semiconductor and System BU @
- 2006 -2008 Group Head-Semiconductor and System BU @
- 2003 -2006 Technical Manager -Semiconductor and System BU @
- 2002 -2002 Technical Lead -TI AMS Products Information Center (PIC) @
- 2000 -2001 FPGA design specialist -Semiconductor and System BU @
- 1999 -2000 FPGA design specialist -Semiconductor and System BU @
- 1997 -1999 Lead - Embedded SW Development- WIPRO Systems Far East group @
- 1992 -1997 Scientist at ISRO Inertial Systems Unit @
- 1989 -1992 Sr Technical Assistant at Vikram Sarabhai Space Centre @
- 1986 -1989 Technical Assistant at Vikram Sarabhai Space Centre @
Jei Narayanan Education
- Indian Institute of Technology (Banaras Hindu University), Varanasi 1993-1995
Jei Narayanan Skills
- VLSI
- ASIC
- Program Management
- Vendor Management
- Semiconductors
- Leadership
- Verilog
- FPGA
- Embedded Systems
- Project Management
- Management
- Technical Recruiting
- ARM
- Semiconductor Industry
- Sourcing
- Team Building
- TCL
- Core Competences
- Debugging
- Functional Verification
- Integrated Circuit Design
- Embedded Software
- SystemVerilog
- Software Project Management
- People Skills
- Multicultural
- Mentoring
- Global Delivery
- Motivational Speaking
- Competency building
- Training Delivery
- Quality Management
- ClearCase
- Coaching
- Cross-functional Coordination
- Task Master
- Operations Management
- Very-Large-Scale Integration (VLSI)
- ARM Architecture
- Field-Programmable Gate Arrays (FPGA)
- Application-Specific Integrated Circuits (ASIC)
- Cross Functional Coordination
- Field Programmable Gate Arrays Fpga
- Linux
- Business Analysis
- Strategy
- Application Specific Integrated Circuits Asic
- JavaScript
- Design
- Software Development
- Very Large Scale Integration Vlsi
- Services
- Application Specific Integrated Circuits
- Very Large Scale Integration
- Field Programmable Gate Arrays
Jei Narayanan Summary
- Jei Narayanan, based in Bengaluru, KA, IN, is currently a Head-VLSI at UST. Jei Narayanan brings experience from previous roles at HCLTech, L&T Technology Services and Synapse Design Inc.. Jei Narayanan holds a 1993 - 1995 Indian Institute of Technology (Banaras Hindu University), Varanasi. With a robust skill set that includes VLSI, ASIC, Program Management, Vendor Management, Semiconductors and more. Jei Narayanan has 1 emails and 1 mobile phone numbers on RocketReach.
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Jei Narayanan
Head-VLSI
Bengaluru, KA, IN
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