Jei Narayanan Email & Phone Number
Head-VLSI @ UST
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Jei Narayanan Location
- Bengaluru, KA, IN
Jei Narayanan Work
- Head-VLSI @ (May 2026 - Present)
- Global Operations Director -Semiconductor Business @ (March 2024 - May 2026)
- Head-VLSI @ (October 2023 - February 2024)
- AVP @ (April 2022 - October 2023)
- Global Operations Director -Semiconductor Business @ (November 2019 - April 2022)
- COO @ (January 2015 - November 2019)
- Practice Head - VLSI and System Design @ (July 2011 - January 2015)
- Group Head- Semiconductor and System BU @ (January 2011 - July 2011)
- Group Head -Semiconductor and System BU @ (April 2010 - December 2010)
- Group Head-Semiconductor and System BU @ (January 2009 - March 2010)
- Group Head-Semiconductor and System BU @ (January 2008 - December 2008)
- Group Head-Semiconductor and System BU @ (June 2006 - March 2008)
- Technical Manager -Semiconductor and System BU @ (January 2003 - May 2006)
- Technical Lead -TI AMS Products Information Center (PIC) @ (January 2002 - December 2002)
- FPGA design specialist -Semiconductor and System BU @ (October 2000 - December 2001)
- FPGA design specialist -Semiconductor and System BU @ (February 1999 - September 2000)
- Lead - Embedded SW Development- WIPRO Systems Far East group @ (June 1997 - January 1999)
- Scientist at ISRO Inertial Systems Unit @ (June 1992 - May 1997)
- Sr Technical Assistant at Vikram Sarabhai Space Centre @ (June 1989 - June 1992)
- Technical Assistant at Vikram Sarabhai Space Centre @ (June 1986 - May 1989)
Jei Narayanan Education
- Indian Institute of Technology (Banaras Hindu University), Varanasi 1993-1995
Jei Narayanan Skills
- VLSI
- ASIC
- Program Management
- Vendor Management
- Semiconductors
- Leadership
- Verilog
- FPGA
- Embedded Systems
- Project Management
- Management
- Technical Recruiting
- ARM
- Semiconductor Industry
- Sourcing
- Team Building
- TCL
- Core Competences
- Debugging
- Functional Verification
- Integrated Circuit Design
- Embedded Software
- SystemVerilog
- Software Project Management
- People Skills
- Multicultural
- Mentoring
- Global Delivery
- Motivational Speaking
- Competency building
- Training Delivery
- Quality Management
- ClearCase
- Coaching
- Cross-functional Coordination
- Task Master
- Operations Management
- Very-Large-Scale Integration (VLSI)
- ARM Architecture
- Field-Programmable Gate Arrays (FPGA)
- Application-Specific Integrated Circuits (ASIC)
- Cross Functional Coordination
- Field Programmable Gate Arrays Fpga
- Linux
- Business Analysis
- Strategy
- Application Specific Integrated Circuits Asic
- JavaScript
- Design
- Software Development
- Very Large Scale Integration Vlsi
- Services
- Application Specific Integrated Circuits
- Very Large Scale Integration
- Field Programmable Gate Arrays
Jei Narayanan Summary
- Jei Narayanan, based in Bengaluru, KA, IN, is currently a Head-VLSI at UST. Jei Narayanan brings experience from previous roles at HCLTech, L&T Technology Services and Synapse Design Inc.. Jei Narayanan holds a 1993 - 1995 Indian Institute of Technology (Banaras Hindu University), Varanasi. With a robust skill set that includes VLSI, ASIC, Program Management, Vendor Management, Semiconductors and more. Jei Narayanan has 1 emails and 1 mobile phone numbers on RocketReach.
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Jei Narayanan
Head-VLSI
Bengaluru, KA, IN
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