Jayasurya B. Email & Phone Number

Jayasurya B. Skills

• Physical Verification
• ERC
• ESD
• Self Heating
• Analog-to-Digital Converters (ADC)
• Phase-Locked Loop (PLL)
• SerDes
• Mask Layout
• RXFE
• Current Mirrors
• Calibre
• Debugging
• Front-End Development
• Self-Motivation
• Layout Tools
• Analog Layout
• Cadence Virtuoso
• Analog Circuits
• Layout Design
• Very-Large-Scale Integration (VLSI)
• Analog Circuit Design
• Mixed Signal
• Circuit Design
• Semiconductors
• Scripting
• Integrated Circuits (IC)
• Matlab
• Verilog
• Python
• C (Programming Language)
• LTSpice
• Cadence Virtuoso Layout Editor
• Xilinx
• Xilinx ISE
• Integrated Circuit Design
• Verilog-A
• IC Layout
• Design Rule Checking (DRC)
• Layout Versus Schematic (LVS)
• TCL
• Mixed-Signal IC Design
• CMOS
• EDA
• Mask Design
• OTA
• Differential Amplifiers
• Cadence
• PEX
• Schematic
• Physical Design