Jasper Balraj's Location

Austin, Texas, United States

Jasper Balraj's Work

Jasper Balraj's Education

  • Oregon Health and Science University

    MS EE (Signal Processing)

    2003 - 2005

Jasper Balraj's Skills

  • SoC
  • ASIC
  • Verilog
  • VLSI
  • RTL Design
  • Semiconductors
  • Logic Design
  • SystemVerilog
  • Functional Verification
  • IC

Jasper Balraj's Summary

Jasper Balraj, based in Austin, Texas, United States, is currently a Senior Principal Design Engineer at Cadence Design Systems, bringing experience from previous roles at AMD, Cadence Design Systems, Samsung Electronics and Intel Corporation. Jasper Balraj holds a 2003 - 2005 MS EE in Signal Processing @ Oregon Health and Science University. With a robust skill set that includes SoC, ASIC, Verilog, VLSI, RTL Design and more, Jasper Balraj contributes valuable insights to the industry. Jasper Balraj has 3 emails on RocketReach.

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