James Ding Email
ASIC Design Engineer @ NVIDIA
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James Ding Location
- Santa Clara, CA, US
James Ding Work
- ASIC Design Engineer @ (May 2026 - Present)
- GPU Fullchip Verification Intern @ (June 2025 - September 2025)
- GPU Unit Design Intern @ (May 2024 - August 2024)
- FPGA System Engineering Intern @ (June 2023 - August 2023)
- FPGA Application Engineering Intern @ (May 2022 - August 2022)
James Ding Education
- Stanford University
Master of Science - MS (Electrical Engineering)
2024-2026 - Rice University
Bachelor of Science - BS (Electrical and Computer Engineering)
2020-2024 - Taipei American School
High School Diploma
2016-2020
James Ding Skills
- ASIC Design
- C (Programming Language)
- C++
- Cadence Virtuoso
- Design Verification
- Digital Circuit Design
- Intel Quartus Prime
- Java
- Large Language Models (LLM)
- Linux
- MATLAB
- Place & Route
- Printed Circuit Board (PCB) Design
- Product Management
- PyTorch
- Python (Programming Language)
- Reinforcement Learning
- Research
- Scikit-Learn
- Timing Analysis
- Verilog
- Vitis HLS
- Xilinx Vivado
James Ding Summary
- James Ding, based in Santa Clara, CA, US, is currently a ASIC Design Engineer at NVIDIA. James Ding brings experience from previous roles at NVIDIA and Intel Corporation. James Ding holds a 2024 - 2026 Master of Science - MS in Electrical Engineering @ Stanford University. With a robust skill set that includes ASIC Design, C (Programming Language), C++, Cadence Virtuoso, Design Verification and more. James Ding has 1 emails on RocketReach.
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