2017 -
2022 DDR PHY Logic Architect and Design Lead, Design Engineering Group @
2014 -
2017 IP Portfolio Verification Lead, Scalable Performance CPU Development Group @
2010 -
2014 Server Design Mixed-signal Verification Lead, Server Development Group @
2004 -
2010 Component Design Engineer, Enterprise Microprocessor Group @
2002 -
2004 Member of Technical Staff @ Cadence Design Systems
Indranil Pal Education
Jadavpur University
Bachelor of Engineering (Electronics and Tele-communication)
1998
-
2002
Indranil Pal Summary
Indranil Pal, based in California, United States, is currently a Principal Engineer at Intel Corporation. Indranil Pal brings experience from previous roles at Intel Corporation. Indranil Pal holds a 1998 - 2002 Bachelor of Engineering in Electronics and Tele-communication @ Jadavpur University. Indranil Pal has 4 emails and 1 mobile phone numbers on RocketReach.
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