Haochen Wang Email
ASIC Verification Engineer @ NVIDIA
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Haochen Wang Location
- Santa Clara, CA, US
Haochen Wang Work
- ASIC Verification Engineer @ (January 2025 - Present)
- ASIC Clocks Intern @ (May 2024 - December 2024)
- Layout Engineer @ (December 2021 - June 2022)
Haochen Wang Education
- University of Southern California
Master of Science - MS (Electrical Engineering (VLSI Design))
2023-2024 - Shanghai University of Engineering Science
Bachelor of Engineering - BE (Electronic Information Engineering)
2018-2022
Haochen Wang Summary
- Haochen Wang, based in Santa Clara, CA, US, is currently a ASIC Verification Engineer at NVIDIA. Haochen Wang brings experience from previous roles at NVIDIA and 南芯半导体. Haochen Wang holds a 2023 - 2024 Master of Science - MS in Electrical Engineering (VLSI Design) @ University of Southern California. Haochen Wang has 1 emails on RocketReach.
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