Gerald Cheung's Location
Palo Alto, CA, US
Gerald Cheung's Work
- ASIC Design Engineer @ Apple
- Senior Principal Engineer, IC Design @ Broadcom
- Senior Staff Engineer, ASIC Design @ Juniper Networks
- Senior Staff Engineer, ASIC Design @ Juniper Networks
- Senior Staff Engineer, Logic Design @ Xsigo Systems
- @ Juniper Networks
- Member of Technical Staff, ASIC Design @ SGI
- Member of Technical Staff, ASIC Design @ Sun Microsystems
Gerald Cheung's Education
- Cornell University1987 - 1992
Gerald Cheung's Skills
- ASIC
- Verilog
- Logic Design
- Debugging
- RTL design
- Computer Architecture
- Static Timing Analysis
- Ethernet
- Hardware
- Public Speaking
Gerald Cheung's Summary
Gerald Cheung, based in Palo Alto, CA, US, is currently a ASIC Design Engineer at Apple, bringing experience from previous roles at Broadcom, Juniper Networks and Xsigo Systems. Gerald Cheung holds a 1987 - 1992 Cornell University. With a robust skill set that includes ASIC, Verilog, Logic Design, Debugging, RTL design and more, Gerald Cheung contributes valuable insights to the industry. Gerald Cheung has 1 email and 1 mobile phone number on RocketReach.
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