Gary Petty Email & Phone Number

UVM Verification Engineer @ MIT Lincoln Laboratory

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Gary Petty Location

Fort Collins, CO, US

Gary Petty Work

UVM Verification Engineer @ (March 2022 - Present)
Chief Executive Officer @ (March 1996 - Present)
Design Verification Engineer @ (October 2009 - June 2013)
Verification Engineer and System Verilog and VMM @ (August 2008 - May 2009)
Verilog Trainer @ Sutherland HDL Consulting (January 2008 - April 2008)
Design and Verification Engineer @ (May 2006 - January 2008)
President @ Techmate Inc. (March 1996 - September 2006)
Digital Design and Verification Engineer @ Alereon, Inc (November 2005 - May 2006)
Digital Design Verification Engineer @ Conformative Systems Inc (August 2004 - August 2005)
Digital Design and Verification Engineer @ (February 2004 - August 2004)
Digital Design and Verification Engineer @ Sharp Microelectronic Tech (September 2003 - February 2004)
Digital Design Verification Engineer @ LSI Logic Corp (August 2002 - September 2003)
VHDL Training Instructor @ Cadence and Esperan Corps (April 2000 - August 2002)
Network Processor Verification Engineer @ Trebia Networks (November 2001 - April 2002)
Design and Verification Engineer @ (May 2000 - November 2001)
Design and Verification Engineer @ National Semiconductor Corp (March 1999 - May 2000)
Design and Verification Engineer @ (November 1997 - March 1999)
Embedded Processor Design and Verification Engineer @ National Semiconductor Corp (April 1996 - November 1997)
Embedded Processor Verification Engineer @ Advanced Micro Devices Corp (September 1995 - April 1996)
Design and Verification Engineer @ NCR Microelectronics (Now LSI formerly Symbios) (April 1990 - September 1995)
Design and Test Engineer @ IBM Corp (August 1988 - March 1990)
Firmware Design Engineer @ Honeywell Corp (February 1988 - August 1988)
Test Engineer @ E-Systems Corp (November 1987 - February 1988)
SW and Firmware Design Engineer @ Unisys Corp. (Formerly Sperry Corp (January 1986 - November 1987)
Systems Engineer @ General Electric Corp (January 1985 - January 1986)
Circuit Design Engineer @ Austron Inc (April 1979 - December 1979)
AGE Design Engineer @ McDonnell Douglas Corp (September 1978 - April 1979)
Circuit Design Engineer @ Scientific Communication Inc (October 1977 - September 1978)
Electronic Warfare Specialist @ (June 1972 - October 1977)

Gary Petty Education

Weber State University
BSEET (Electronics)
1974-1977

Gary Petty Skills

SystemVerilog
Open Verification Methodology
Specman
Verilog
ASIC
Perl
Shell Scripting
Unix
SoC
RTL design
VHDL
Hardware Architecture
Integrated Circuit Design
IC
Mixed Signal
Debugging
EDA
Troubleshooting
Power
Programming
Customer Service
Strategic Planning
Microsoft Office
Design
Verification
Engineering
SQL

Gary Petty Summary

Gary Petty, based in Fort Collins, CO, US, is currently a UVM Verification Engineer at MIT Lincoln Laboratory. Gary Petty brings experience from previous roles at Xpeerant Inc., Texas Instruments, Sun Microsystems and Sutherland HDL Consulting. Gary Petty holds a 1974 - 1977 BSEET in Electronics @ Weber State University. With a robust skill set that includes SystemVerilog, Open Verification Methodology, Specman, Verilog, ASIC and more. Gary Petty has 3 emails and 2 mobile phone numbers on RocketReach.