Eric Mattern Email & Phone Number
Sr Staff Engineer, SOC Physical Design @ GreenWave™ Radios
5 free lookup(s).
If you need more lookups,
subscriptions start at $34 USD/month.
Eric Mattern Location
- San Jose, CA, US
Eric Mattern Work
- Sr Staff Engineer, SOC Physical Design @ (February 2023 - Present)
- PE CAD Engineer @ (May 2022 - February 2023)
- SoC Design Engineer @ (December 2021 - May 2022)
- Senior Staff CAD Engineer @ (January 2020 - December 2021)
- Sr Staff CAD Engineer @ (September 2016 - December 2019)
- SMTS Layout Engineer @ Altera (October 2013 - September 2016)
- SMTS Layout Engineer @ (October 2013 - September 2016)
- Sr Layout Engineer @ (October 2012 - November 2013)
- Sr Engineer, CAD @ (November 2009 - October 2012)
- CAD and Layout Consultant @ (January 2009 - November 2009)
- Principal CAD and Layout Engineer @ (August 2004 - May 2009)
- CAD Engineer ( Contractor ) @ (January 2003 - January 2004)
- Constultant -CAD and Layout Engineer @ Barcelona Design and Canesta (January 2002 - January 2003)
- Senior Layout Specialst @ Stratalight (January 2001 - January 2003)
- Staff Engineer, Physical Design @ (June 1998 - May 2000)
- Physical Design Engineer @ (July 1999 - April 2000)
- Member of the Technical Staff @ 8x8 (January 1996 - January 1997)
- System Design Engineer @ (January 1991 - January 1996)
Eric Mattern Education
- Heald College
yes (Electronic Technology)
1976-1977 - Willow Glen High
Eric Mattern Skills
- ASIC
- Analog
- Application-Specific Integrated Circuits (ASIC)
- Assura
- BiCMOS
- Board Layout
- CAD
- CDF
- CMOS
- Cadence
- Cadence Licensing
- Cadence Virtuoso
- DRC
- EDA
- Floorplanning
- IC
- IC layout
- InP
- Integrated Circuit Design
- Integrated Circuits (IC)
- LVS
- Layout
- Logic Design
- Mixed Signal
- PADS
- PCB Design
- PDK
- Physical Design
- Physical Verification
- Place & Route
- RF
- RTDA NC
- SiGe
- Silicon
- Simulations
- SoC
- Spectre
- VLSI
- Very-Large-Scale Integration (VLSI)
- Place and Route
- Integrated Circuits Ic
- Application Specific Integrated Circuits Asic
- Very Large Scale Integration Vlsi
- Application Specific Integrated Circuits
- Integrated Circuits
- Very Large Scale Integration
Eric Mattern Summary
- Eric Mattern, based in San Jose, CA, US, is currently a Sr Staff Engineer, SOC Physical Design at INNOPHASE. Eric Mattern brings experience from previous roles at Rambus, Intel Corporation, Silanna and InvenSense, Inc.. Eric Mattern holds a 1976 - 1977 yes in Electronic Technology @ Heald College. With a robust skill set that includes ASIC, Analog, Application-Specific Integrated Circuits (ASIC), Assura, BiCMOS and more. Eric Mattern has 2 emails and 3 mobile phone numbers on RocketReach.
Looking for a different Eric Mattern?
Find contact details for 700 million professionals.
Others Named Eric Mattern
Rick Mattern
Project Manager Estimator
Post Falls, ID, US
Eric Mattern
Sr Staff Engineer, SOC Physical Design
San Jose, CA, US
Eric Mattern
Truck Driver
New Waterford, OH, US
Top GreenWave™ Radios Employees
Victoria Albright
Director, Human Resources
San Diego, CA, US
Eric Mattern
Sr Staff Engineer, SOC Physical Design
San Jose, CA, US
Piers O'Hanlon
Director of Software and Firmware Engineering
Escondido, CA, US
Jing Yu
Sr. Staff Firmware Engineer
San Diego, CA, US
Manisha Koneru
Senior Digital Design Engineer
Sunnyvale, CA, US
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co