Eric Leung Email & Phone Number
Senior Staff Design Engineer @ Marvell India
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Eric Leung Location
- Fremont, CA, US
Eric Leung Work
- 2002 -now Senior Staff Design Engineer @
- 2000 -2002 Staff Vlsi Design Engineer @
- 2000 -2000 Staff Vlsi Design Engineer @ Excess Bandwidth
- 1996 -2000 Senior Design Engineer @
Eric Leung Education
- Stanford University
Master of Science (Electrical Engineering)
2004-2005 - The University of Hong Kong
Bachelor of Engineering (Engineering)
1991-1994
Eric Leung Skills
- ASIC
- Digital Signal Processors
- EDA
- Semiconductors
- FPGA
- Verilog
- Static Timing Analysis
- RTL design
- Mixed Signal
- VLSI
- IC
- SoC
- Integrated Circuit Design
- CMOS
- Analog
- Low-power Design
- Embedded Systems
- SystemVerilog
- Application-Specific Integrated Circuits (ASIC)
- Very-Large-Scale Integration (VLSI)
- Desarrollos Abap
- Application Specific Integrated Circuits Asic
- Fusiones Y Separaciones En Sap
- Low Power Design
- Very Large Scale Integration Vlsi
- Very Large Scale Integration
- Application Specific Integrated Circuits
Eric Leung Summary
- Eric Leung, based in Fremont, CA, US, is currently a Senior Staff Design Engineer at Marvell Semiconductor. Eric Leung brings experience from previous roles at Globespan, Excess Bandwidth and Amd. Eric Leung holds a 2004 - 2005 Master of Science in Electrical Engineering @ Stanford University. With a robust skill set that includes ASIC, Digital Signal Processors, EDA, Semiconductors, FPGA and more. Eric Leung has 2 emails and 2 mobile phone numbers on RocketReach.
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