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Eric Location
San Mateo, CA, US
Eric Work
Senior Engineer @ (April 2026 - Present)
Principal Engineer @ (December 2025 - March 2026)
Emulation Architect @ (November 2021 - November 2025)
CPU Engineer @ (July 2020 - August 2021)
Staff Software Engineer @ (September 2017 - July 2020)
Senior Hardware Verification Engineer @ (September 2012 - August 2017)
Research Assistant @ (September 2007 - July 2012)
Visiting Research Assistant @ (June 2011 - August 2011)
Software engineer @ Avery Design Systems (January 2006 - October 2006)
Software engineer (Co-op) @ Avery Design Systems (January 2002 - August 2004)
Eric Education
University of Michigan
Ph. D (Electrical Engineering)
2007-2012
National Taiwan University
Master of Science (Electronic Engineering)
2002-2004
National Central University
Bachelor of Science (Electrical Engineering)
1998-2002
Eric Skills
Hardware Emulation
Universal Verification Methodology (UVM)
Architecture Modeling
SystemC/C++
Simulation
VLSI
Electrical Engineering
Integrated Circuits (IC)
Field-Programmable Gate Arrays (FPGA)
Verilog
Perl
PCIe
Functional Verification
SystemVerilog
Computer Architecture
Microprocessors
Emulsions
Prototyping
SQL
Silicon Validation
cycle-accurate modeling
hardware software integration
performance model
software bringup
Eric Summary
Eric, based in San Mateo, CA, US, is currently a Senior Engineer at NVIDIA. Eric brings experience from previous roles at Arm, Waymo, Apple and Xilinx. Eric holds a 2007 - 2012 Ph. D in Electrical Engineering @ University of Michigan. With a robust skill set that includes Hardware Emulation, Universal Verification Methodology (UVM), Architecture Modeling, SystemC/C++, Simulation and more. Eric has 2 emails and 2 mobile phone numbers on RocketReach.
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