Devansh Saxena Email
Senior Physical Design Engineer @ NVIDIA
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Devansh Saxena Location
- Bengaluru, KA, IN
Devansh Saxena Work
- Senior Physical Design Engineer @ (February 2026 - Present)
- Staff Engineer @ (July 2025 - February 2026)
- Senior Product Specialist @ (April 2025 - February 2026)
- Product Specialist II @ (April 2023 - April 2025)
- Product Specialist @ (July 2021 - April 2023)
- Member @ (August 2017 - May 2021)
- Summer In-House Training @ (June 2020 - July 2020)
- Winter Training @ (December 2019 - January 2020)
- Project Trainee @ (January 2019 - March 2019)
- Summer Intern @ (June 2018 - July 2018)
Devansh Saxena Education
- Delhi Technological University (Formerly DCE)
Bachelor of Technology - BTech
2017-2021 - Kendriya Vidyalaya 2011-2017
- Our Lady of Perpetual Succour, High School, Mumbai 2005-2011
Devansh Saxena Skills
- C
- C++
- FPGA
- HTML
- Linux
- Matlab
- Perl
- Python
- SQL
- Verilog
- Vivado HLS
- Xilinx Vivado HLS
Devansh Saxena Summary
- Devansh Saxena, based in Bengaluru, KA, IN, is currently a Senior Physical Design Engineer at NVIDIA. Devansh Saxena brings experience from previous roles at Synopsys Inc and Ansys. Devansh Saxena holds a 2017 - 2021 Bachelor of Technology - BTech @ Delhi Technological University (Formerly DCE). With a robust skill set that includes C, C++, FPGA, HTML, Linux and more. Devansh Saxena has 1 emails on RocketReach.
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