Daniel Crepeau Email
Senior ASIC DFT and DV Engineer @ SPARK Microsystems
5 free lookup(s). No credit card required.
If you need more lookups,
subscriptions start at $34 USD/month.
Daniel Crepeau Location
- Montreal, QC, CA
Daniel Crepeau Work
- Senior ASIC DFT and DV Engineer @ (January 2026 - Present)
- SOC DFT Consultant @ My own Company (August 2025 - January 2026)
- DFT and DV Engineer @ (February 2014 - November 2023)
- DFT Research engineer ( LACIME) @ École de technologie supérieure (ÉTS) (June 2012 - January 2014)
- Networks-Electronic Teacher @ CEGEP de Lanaudiere (January 2012 - June 2013)
- DFT EDA Tools QA Engineer @ Mentor Graphics ( Now Siemens) (August 2009 - January 2011)
- Test Engineer @ LogicVision (Now Siemens) (November 2000 - August 2009)
- ASIC Backend Team Leader @ (May 1998 - July 2000)
- Telecom and VLSI research engineer (LACIME) @ École de technologie supérieure (ÉTS) (May 1996 - May 1998)
Daniel Crepeau Education
- École de technologie supérieure
Master (Electrical Enginneering,)
1996 - École de technologie supérieure
Bachelor (Electrical Engineering)
1993
Daniel Crepeau Skills
- AMBA AXI/APB
- ARM ADI/JTAG-DP
- ASIC
- ATPG
- Application-Specific Integrated Circuits (ASIC)
- Assertion Base Verification
- Assertion Based Verification
- Automatic Test Equipment
- Automatic Test Pattern Generation (ATPG)
- Boundary Scan
- Cisco Networking
- Clocking
- Code Coverage
- Constraint Random Coverage Driven Verification ( CRCDV)
- DFT
- DFT Compiler
- Doxygen
- Electronic Design
- Fastscan
- Formal Verification
- Functional Verification
- GNU Make
- Git
- IC
- Integrated Circuit Design
- Jenkins
- Linux
- Microsoft Visual Studio Code
- Perl
- Physical Synthesis
- Python (Programming Language)
- SOC Design Verification
- SPACC
- Scan Insertion
- Shell Scripting
- Simulations
- SoC
- Static Timing Analysis
- Subversion
- Synopsys Formality
- Synopsys Primetime
- Synopsys VCS
- System on a Chip (SoC)
- SystemC
- SystemVerilog
- TCL
- TLM
- TRNG
- Teaching
- Team lead
- TestRail
- Testing
- Tetramax
- Transient Delay fault (TDF)
- Universal Verification Methodology (UVM)
- VHDL
- Verilog
- WaveDrom
Daniel Crepeau Summary
- Daniel Crepeau, based in Montreal, QC, CA, is currently a Senior ASIC DFT and DV Engineer at SPARK Microsystems. Daniel Crepeau brings experience from previous roles at My own Company, Octasic, École de technologie supérieure (ÉTS) and CEGEP de Lanaudiere. Daniel Crepeau holds a Master in Electrical Enginneering, @ École de technologie supérieure. With a robust skill set that includes AMBA AXI/APB, ARM ADI/JTAG-DP , ASIC, ATPG, Application-Specific Integrated Circuits (ASIC) and more. Daniel Crepeau has 2 emails on RocketReach.
Looking for a different Daniel Crepeau?
Find contact details for 700 million professionals.
Others Named Daniel Crepeau
Daniel Crepeau
Vice-President Finance et Administration and retraité en 2021
Terrebonne, QC, CA
Dan Crepeau
Operations Manager
Chicago, IL, US
Daniel Crépeau
Chief Operating Officer
Montreal, QC, CA
Dan Crepeau
Engineering Coordinator
Columbus, OH, US
Daniel Crepeau
Directeur et administrateur principal
Montreal, QC, CA
Top SPARK Microsystems Employees
Larry Zakaib
Director of Program Management
Montreal, QC, CA
Joao-Pedro Leitao
Finance and Accounting Manager
Montreal, QC, CA
Alberto Prud'Homme
Product Director
Ottawa, ON, CA
G2 Crowd Trusted
300K+ Plugin Users
© 2026 RocketReach.co