Michiel Soer Email
Co-Founder, Principal Wireless ASIC Architect @ SPARK Microsystems
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Michiel Soer Location
- Montreal, QC, CA
Michiel Soer Work
- 2016 -now Co-Founder, Principal Wireless ASIC Architect @
- 2014 -2018 Research Associate @
- 2012 -2014 Post-Doctoral Researcher @
- 2007 -2012 PhD Researcher @
- 2006 -2007 Analog Test Engineer Internship @
Michiel Soer Education
- University of Twente
PhD (with honors) (Electrical Engineering)
2007-2012 - University of Twente
MSc (with honors) (Electrical Engineering)
2005-2007 - University of Twente
BSc (Electrical Engineering)
2002-2005
Michiel Soer Skills
- Team Motivation
- Employee Evaluation
- Team Leadership
- Project Engineering
- Product Specification
- Product Development
- Interpersonal Communication
- Resource Allocation
- Python (Programming Language)
- Team Management
- Mixed-Signal IC Design
- TCL
- Cadence Virtuoso
- Analog Circuit Design
- RF
- CMOS
- IC
- Phased Array
- Analog
- Simulations
- Testing
- Circuit Design
- Mixed Signal
- Signal Processing
- C/C++
- OpenGL
- Integrated Circuit Design
- ASIC
- Cadence
- VHDL
- Atmel AVR
- Matlab
- Latex
- SoC
- C++
Michiel Soer Summary
- Michiel Soer, based in Montreal, QC, CA, is currently a Co-Founder, Principal Wireless ASIC Architect at SPARK Microsystems. Michiel Soer brings experience from previous roles at Université du Québec à Montréal, University of Twente and Texas Instruments. Michiel Soer holds a 2007 - 2012 PhD (with honors) in Electrical Engineering @ University of Twente. With a robust skill set that includes Team Motivation, Employee Evaluation, Team Leadership, Project Engineering, Product Specification and more. Michiel Soer has 1 emails on RocketReach.
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