Cuong le Email & Phone Number
Principal Design Verification Engineer @ Marvell India
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Cuong le Location
- San Jose, CA, US
Cuong le Work
- Principal Design Verification Engineer @ (April 2024 - Present)
- Sr Staff Design Verification Engineer @ (June 2022 - April 2024)
- Staff Design Verification Engineer @ (November 2020 - June 2022)
- Technical Contributor @ (December 2019 - November 2020)
- Senior Design Verification Engineer @ (April 2019 - November 2020)
- Design Verification Engineer @ (April 2017 - April 2019)
- Design Verification Engineer @ (April 2016 - April 2017)
- Associate Design Verification Engineer @ (July 2014 - April 2016)
- Engineering Team Lead @ (January 2014 - July 2014)
- Embedded Software Engineer @ (March 2013 - December 2013)
- Intern @ (July 2012 - August 2012)
Cuong le Education
- Ho Chi Minh City University of Technology
Honor Bachelor's degree (Computer Engineering)
2008-2013 - Luong Van Chanh high school for the gifted
Mathematics
2005-2008
Cuong le Skills
- AMBA
- ARM
- AXI
- Automotive
- C
- C (Programming Language)
- C++
- Embedded C
- Embedded Linux
- Embedded Software
- Embedded Systems
- FPGA
- Infiniband
- Linux
- Linux Kernel
- Microcontrollers
- NVM Express (NVMe)
- NVMe Over Fabrics (NVMeOF)
- Perl
- Python (Programming Language)
- RDMA
- Security
- System on a Chip (SoC)
- SystemC
- SystemVerilog
- UVM
- Universal Verification Methodology (UVM)
- Verilog
- Xilinx ISE
Cuong le Summary
- Cuong le, based in San Jose, CA, US, is currently a Principal Design Verification Engineer at Marvell Technology. Cuong le brings experience from previous roles at Marvell Technology, Qualcomm, Accellera Systems Initiative and Marvell Semiconductor. Cuong le holds a 2008 - 2013 Honor Bachelor's degree in Computer Engineering @ Ho Chi Minh City University of Technology. With a robust skill set that includes AMBA, ARM, AXI, Automotive, C and more. Cuong le has 2 emails and 1 mobile phone numbers on RocketReach.
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