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Chi Lin Location
San Jose, CA, US
Chi Lin Work
2017 -now Director Of Engineering @
2006 -now HW Engineering Manager @
Chi Lin Education
National Chiao Tung University
Chi Lin Skills
UVM/SytemVerilog
Verilog
Debugging
FPGA
RTL design
PCB design
Product Marketing
Online Retail
Virtual Assistant
Sales
Logistics
Customer Satisfaction
Competitive Analysis
Engineering
Lean Management
Lean Operations
Operations Management
Manufacturing
Product Management
Social Media Marketing
Automotive Aftermarket
Brand Management
Supply Chain
Chi Lin Summary
Chi Lin, based in San Jose, CA, US, is currently a Director Of Engineering at Marvell Semiconductor. Chi Lin brings experience from previous roles at Marvell Semiconductor Corp. Chi Lin holds a National Chiao Tung University. With a robust skill set that includes UVM/SytemVerilog, Verilog, Debugging, FPGA, RTL design and more. Chi Lin has 2 emails and 3 mobile phone numbers on RocketReach.
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