Chen Yan Email & Phone Number
Lead Physical Design Engineer @ Cadence Design Systems
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Chen Yan Location
- Chapel Hill, NC, US
Chen Yan Work
- 2020 -now Lead Physical Design Engineer @
- 2017 -2020 Senior Physical Design Engineer @
Chen Yan Education
- Stony Brook University
Doctor of Philosophy - PhD (Computer Engineering)
2013-2018
Chen Yan Skills
- Physical Design
- Place and Route (PnR)
- Static Timing Analysis
- Circuit Design
- Programming
- VLSI
- Application-Specific Integrated Circuits (ASIC)
- Verilog
- VHDL
- Linux
- Python
- LaTeX
- Synopsys IC Compiler 2 (ICC2)
- Synopsys Primetime
- Synopsys Design Compiler (DC)
- Synopsys StarRC
- Synopsys HSPICE
- Cadence Encounter
- Cadence Innovus
- Cadence Virtuoso
- Floorplanning
- Clock Tree Synthesis
- Power Analysis
- Parasitic Extraction
- Design Rule Checking (DRC)
- Layout Versus Schematic (LVS)
- Signal Integrity
Chen Yan Summary
- Chen Yan, based in Chapel Hill, NC, US, is currently a Lead Physical Design Engineer at Cadence Design Systems. Chen Yan brings experience from previous roles at GLOBALFOUNDRIES. Chen Yan holds a 2013 - 2018 Doctor of Philosophy - PhD in Computer Engineering @ Stony Brook University. With a robust skill set that includes Physical Design, Place and Route (PnR), Static Timing Analysis, Circuit Design, Programming and more. Chen Yan has 2 emails and 1 mobile phone numbers on RocketReach.
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