Brian Folsom Email & Phone Number
Senior ASIC Verification Engineer @ NVIDIA
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Brian Folsom Location
- Boston, MA, US
Brian Folsom Work
- 2026 -now Senior ASIC Verification Engineer @
- 2025 -2025 Principal Engineer @
- 2024 -2025 Senior Principal Engineer @
- 2022 -2024 Digital Design Engineer @
- 2018 -2022 Principal Digital IC Design Engineer @
- 2009 -2018 Principal Hardware Engineer @
- 2007 -2008 MTS Design Engineer @
- 2006 -2007 Principal Consulting Engineer @
- 2004 -2006 Consulting Hardware Engineer @
- 2003 -2004 Consulting Hardware Engineer @
- 2000 -2003 Founder, Director ASIC Verification, Principal ASIC Architect @ Trebia Networks
- 1999 -2000 Staff ASIC Engineer @
- 1998 -1999 Director Platform Architecture @ HotRail Technologies
- 1995 -1998 Director Engineering @ DeskStation Technology
- 1989 -1995 Senior Development Engineer @ AlliedSignal Aerospace
Brian Folsom Education
- The University of Kansas
BSCE
Brian Folsom Skills
- MIPS
- PCIe
- SystemVerilog
- X86
- Fibre Channel
- SoC
- ASIC
- Verilog
- Functional Verification
- Processors
- RTL design
- Linux
- Hardware
- Microprocessors
- TCL
- Hardware Architecture
- Debugging
- Firmware
- Device Drivers
- Computer Architecture
- Formal Verification
- VLSI
- Embedded Systems
- Logic Synthesis
- ARM
- Perl
- Consulting
- C/C++
- Microsoft Office
- Universal Verification Methodology Uvm
- Python
- Design
- Spanning
- Computer Engineering
- Architecture
- Verification
- Universal Verification Methodology
Brian Folsom Summary
- Brian Folsom, based in Boston, MA, US, is currently a Senior ASIC Verification Engineer at NVIDIA. Brian Folsom brings experience from previous roles at Tenstorrent, Marvell Technology, Lightmatter and Marvell Semiconductor. Brian Folsom holds a BSCE @ The University of Kansas. With a robust skill set that includes MIPS, PCIe, SystemVerilog, X86, Fibre Channel and more. Brian Folsom has 1 emails and 2 mobile phone numbers on RocketReach.
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