Bhavya Gowda Email
Associate engineer 3 @ UST
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Bhavya Gowda Location
- Bengaluru, KA, IN
Bhavya Gowda Work
- Associate engineer 3 @ (October 2025 - Present)
- Pre-Silicon Validation Engineer @ (March 2022 - December 2025)
- Senior Engineer @ (November 2024 - October 2025)
- Engineer @ (February 2022 - March 2022)
- Design Engineer - FPGA @ AutoTEC Systems Pvt Limited (December 2020 - January 2022)
- Trainee Engineer @ AutoTEC Systems Pvt Limited (December 2019 - December 2020)
Bhavya Gowda Education
- SDM INSTITUTE OF TECHNOLOGY (SDMIT), UJIRE
Bachelor's degree (Electronics and Communications Engineering)
2014-2018 - SDM Higher Primary School Ujire
SSLC
2011-2012 - SDM College Ujire
PUC (PCMS)
Bhavya Gowda Skills
- C (Programming Language)
- Field-Programmable Gate Arrays (FPGA)
- Soc design
- platform emulation
- Emulation
- Pre silicon validation
- Verilog
- Python (Programming Language)
- VHDL
Bhavya Gowda Summary
- Bhavya Gowda, based in Bengaluru, KA, IN, is currently a Associate engineer 3 at UST. Bhavya Gowda brings experience from previous roles at L&T Technology Services, Insemi Technology Services Pvt. Ltd. and AutoTEC Systems Pvt Limited. Bhavya Gowda holds a 2014 - 2018 Bachelor's degree in Electronics and Communications Engineering @ SDM INSTITUTE OF TECHNOLOGY (SDMIT), UJIRE. With a robust skill set that includes C (Programming Language), Field-Programmable Gate Arrays (FPGA), Soc design, platform emulation, Emulation and more. Bhavya Gowda has 1 emails on RocketReach.
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