Benjamin Staveley Location

Mountain View, CA, US

Benjamin Staveley Work

  • 2015 - 2017 MTS @ Innovium Inc.
  • 2013 - 2015 IC ASIC design engineer @ Finisar Corporation
  • 2001 - 2013 Director @ Startup: TTM Engineering, GmbH
  • 2000 - 2001 ASIC design engineer @ Texas Instruments
  • 1999 - 2000 ASIC design engineer @ Startup: argon networks
  • 1995 - 1998 ASIC Engineer @ Data General

Benjamin Staveley Education

  • Cornell University

    MS (Physics)

    1992 - 1994
  • Worcester Polytechnic Institute

    Bachelor of Science (BS) (Physics)

    1989 - 1991

Benjamin Staveley Skills

  • ASIC
  • Verilog
  • Timing Closure
  • UVM
  • DRC
  • System Architecture
  • Synopsys tools
  • C
  • Floorplanning
  • Semiconductors

Benjamin Staveley Summary

Benjamin Staveley, based in Mountain View, CA, US, is currently a Hardware Engineer at Baya Systems. Benjamin Staveley brings experience from previous roles at Ventana Micro Systems, SiFive, Innovium Inc. and Finisar Corporation (NASDAQ: FNSR). Benjamin Staveley holds a 1992 - 1994 MS in Physics @ Cornell University. With a robust skill set that includes ASIC, Verilog, Timing Closure, UVM, DRC and more. Benjamin Staveley has 1 emails on RocketReach.

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